Vertically grown VLS nanowires have proven their potential as promising building blocks for application in (semiconductor-based) optics and electronics. However, the respective pick-and-place techniques which have to be employed for the deterministic implementation of nanowires to the dominant Si(001) technological platform are barely scalable. Si nanowires can be formed top-down by structuring the Si device layer of silicon-on-insulator (SOI) substrates. In this context, pure Ge and SiGe alloyed nanowires would provide distinct benefits in expanding device functionalities. However, for high Ge contents, the achievable thickness of pseudomorphic, defect-free (Si)Ge epilayers is just a couple of monolayers if growth directly on Si(001) substrates. Above this thickness, the inherent strain between the layer and substrate leads to harmful plastic or elastic relaxation under common growth conditions. Thus, using conventional epitaxy, the attainable defect-free SiGe/Si layer thicknesses are typically far from being usable in electronic transport devices.

Therefore, we depart from established (Si)Ge epitaxy temperatures of ≥500°C and employ molecular beam epitaxy (MBE) growth at ultra-low temperatures (ULT), ranging from 100°C to 350°C. We show that the lowered surface kinetics leads to a pronounced layer supersaturation, allowing us to access layer thicknesses that are more than an order of magnitude larger than previously reported values. We highlight that pristine growth pressures in the extreme high vacuum range (XHV, ≤10^{-12} mbar) are crucial to keep the density of unwanted impurities in the (Si)Ge layers to a minimum and, thus, enable excellent electrical and optical properties of the grown heterostructures. This low growth pressures are particularly important in ULT growth since the low thermal budget impedes the efficient desorption of residual gas molecules from the substrate.

We show that such fully strained, defect-free (Si)Ge epilayers grown directly on SOI substrates form nanosheets for which the properties like thickness, SiGe(Sn) content, and barrier material, doping can be conveniently tuned during the epitaxy process beyond past limitations. These nanosheets are the highly scalable base for advanced transport devices, such as reconfigurable transistors with excellent performance characteristics.